This invention relates to electronic memories, and, in particular, to a nonvolatile associative memory cell suitable for read and write operation.
Associative memories or associative content addressable memories (ACAM or CAM) are useful in many applications where a number of records must be searched to see if there is a match to another word. The utility of the ACAM is that the records are searched in parallel and consequently the search can be accomplished in a much shorter time than in a serial search through a conventionally organized memory. Despite the apparent advantage of ACAMs for search applications, they have not been widely utilized because of their high cost relative to conventional memories.
In many applications it is desirable to alter one word in the memory without disturbing the other words. Previous implementations of nonvolatile ACAMs using simple two transistor cells have depended on various write mechanisms. One type of write mechanism alters all cells on an integrated circuit by removing electrons from the storage gate by either exposure to ultraviolet light or application of voltage to the substrate. Another type of write mechanism changes the stored information on an entire column by causing a charge (electron) to tunnel to the storage regions of the transistors in that column by applying a high voltage on the gate line.
Selected methods utilizing associative memory cells are illustrated in the following references. In U.S. Pat. No. 3,693,174, issued to MacKnight, one associative memory array system is comprised of selected memory cells. These memory cells are further comprised of at least two storage transistors and at least five semiconductor switches, preferably transistors. Both storage transistors are nonvolatile type transistors which allow the information stored in them to be read without deteriorating the signal stored therein. FIG. 1 depicts the MacKnight system.
In U.S. Pat. No. 3,750,115, issued to Mundy, a basic memory cell for use in an associative array which consists of three transistors and two voltage variable capacitors is described. To use this cell in a parallel associative search, the flag line of all the cells to be searched in parallel must be common. This means that the flag line must run parallel to the data lines.
In U.S. Pat. No. 3,800,297 issued to Mundy et al., a basic memory cell is used in an associative memory array that is composed of four transistors: two storage transistors and two switching transistors. By applying a large negative pulse to a word line, writing is possible in all the cells connected to the word line.
In U.S. Pat. No. 4,064,494, issued to Dickson et al. a memory cell that allows writing is disclosed but the method to write requires the erasure of all contents in the content addressable memory. Also, unselected, previously stored words are protected in their selected locations while new words are written into their respective cells.
To understand the operation of ACAMs and their application FIG. 1 shows an ACAM 10. In this memory the contents of an "n" position register 12 are simultaneously compared with "m" words contained in array 14. If a match or matches are found, a flag is present on the appropriate y.sub.j output or outputs. For maximum utility, it is desirable to have each location in the input register and the memory capable of three states, "1", "0", and "don't care". Locations capable of storing these three states have been referred to as "trits". It is the purpose of this invention to describe means of storing trits at location 16 in a CAM that will minimize the area occupied by the trit and allow any single arbitrary word in the array to be electrically altered in order to enhance the utility of the memory in a system.